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LTC3525L-3

Hi,

I try to boost a 1.5 V from a 337 Renata battery to 3 V. The intended IC is "LTC3525L-3".

Battery data - below:

https://www.renata.com/consumer-products/silver-oxide-0/

https://uk.farnell.com/renata/337/cell-button-s-oxide-1-55v-337/dp/2066057

Purchased recently your eval board "DC879A-A".

It delivers 3.3 V. Ok for the initial test purpose. I will replace the IC with the "real" one during the next phase of the experiments.

The problem I face:

The battery is not able to delivery the specified on page 3 "Input Current and VOUT at Start-Up" - up to 400 mA during 100 us and 100 mA during 400 us.

https://www.analog.com/media/en/technical-documentation/data-sheets/3525laf.pdf

Therefore I plan to add a RC filter to the SHDN pin and to have two capacitors of 22uF – tottaly 44 uF – two 0402 package, 6.3 V in parallel to the input. The battery's internal resistance limits the capacitor charge current to about 25 mA. The capacitors get charged within 3-4 ms. 

In addition, the RC filter output goes via a voltage divider – activation voltage is only 0.5 V. Via 560 and 470 would cover for the tolerance of 0.88 V (56/(47+56)*1.5= 0.88). The needed current is 1 uA.

The idea is:

  1. The battery gets connected by mechanical switch.
  2. The cap C121 and C122 gets charged.
  3. The voltage V/SHDN raises to maximum in some seconds
  4. The output voltage starts the uP.
  5. The uP pulls-up the SHDN pin for stabilisation – the V_337 dips down during transmission.
  6. Transmission starts after that.

I did some practical experiments. The concept looks to be viable.

Now, the next thing that is necessary is to keep the SHDN input above it's threshold. One possibility is to drive it from a uP, another - to connect the VuP via a diode to the SHDN pin.

The question is:

A text on page 6, paragraph "shutdown" from the data sheets says:

"the LTC3525L-3 has a proprietary test mode that may be engaged if SHDN is held in the range of 0.5V to 1V higher than the greater of VIN or VOUT. "

For my case:

Vin = 1.5

Vout = 3 V.

Thus the risk of entering the test mode is if the Vshdn is higher than the Vout + 0.5 to 1 V, e.g. 3.5 to 4 V.

Meaning my solution shall be ok.

Please advice.

Thanks for your feedback.

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