LTC3589: Modifying Register L2DTV2 bit(6:5), will it glitch on PGOOD pin?

Hello, Unfortunately changing the voltage setting on LDO4 from the default 2.8V to 3.3V can cause PGOOD to toggle low and there is not a mask for the LDO4 PGOOD. Is this a one-time event that will only occur shortly after startup?

Hi

Thanks for the reply. The voltage adjustment on LDO4 is a 1 times change at powerup because this LDO cannot be set with resistor divider unfortunately. I have a few more questions.

Question#1: If I ground the pin EN_LDO34, then after my CPU is started and PGOOD is high, what happen if I enable LDO 3 and 4 using the OVEN register, is it going to glitch PGOOD also?

Question#2: In my implementation, power-Up and Down are using PWR_ON Pin only. What happen if PWR_ON=0 but a supply enable pin =1, does the corresponding DCDC or LDO supply stay enabled? It is not clear in the datasheet if PWR_ON acts like a master reset masking all the supply enable pins.

Question#3: I plan to use PGOOD as a Reset signal for my processor, is it a recommended practice? I think it is ideal because it would insure the processor will start only when all voltage are stable.

If the problem with LDO4 cannot be fixed, I have workaround solution:

- I could use an external LDO with PGOOD (TPS745) to replace LDO4. There is a cost penalty of about $0.30

- Instead of LTC3489 I could use the LTC3676, which is more flexible for LDO voltage adjustment. There is a cost penalty of about $1

Best regards

Hello, I just double checked on this. My first answer was not correct. 

LDO4 doesn’t have the DAC slew like the bucks and LDO2 and doesn’t pull PGOOD when changing from one output to another. When the register is written a different tap point in the internal feedback divider is selected.  There is a 25us time filter on all the PGOODs so if LDO slews from 2.8V to 0.93 * 3.3V in under 25us there won’t be a PGOOD event.  With 1uF output cap and small load they could make the change without PGOOD falling.

Sorry about the miss-information.

Hi

Thanks for the correction on LDO4. But I wont be able to use your trick safely, the load is moderate and I will have more than 1uF. So I made up my mind and I will use a low cost external LDO.

In my previous reply I added a few more questions. I very interested if you could answer the question 2, and 3. You can forget about question #1.

Best regards

Hello, For question 2 the PWR_ON pin does need to be pulled high since this acts like a master on/off pin so needs to be high for outputs to be enabled. 

There are “keep-alive” bits on the bucks and LDO2 that override their enables and PWR_ON.

The answer for question 3 may be different for different customers. It can be used as a RESET as done for many other ICs. There is also the /RST0 pin which also can be used for a RESET. For this application if using the separate LDO so LDO4 does not need to change and cause a PGOOD from togging it appears PGOOD can work well for this application. 

Hello, For question 2 the PWR_ON pin does need to be pulled high since this acts like a master on/off pin so needs to be high for outputs to be enabled. 

There are “keep-alive” bits on the bucks and LDO2 that override their enables and PWR_ON.

The answer for question 3 may be different for different customers. It can be used as a RESET as done for many other ICs. There is also the /RST0 pin which also can be used for a RESET. For this application if using the separate LDO so LDO4 does not need to change and cause a PGOOD from togging it appears PGOOD can work well for this application. 

I am now very confident to use the LTC3589 in my design. 

Thanks for your well researched answers!