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LTC2974 PWRGD pin assert delay

Hi,Support team

I'm evaluating DC1978A(LTC2974 demo board kit).

Regarding PWRGD pin,There seems to be a delay of  >140 msec after all power rails goes up.

I tried "Mfr_config_all_pwrgd_off_uses_uv = 1" and "MFR_POWERGOOD_ ASSERTION_DELAY = 0ms",

and It was confirmed that the assertion time changed, but it did not become less than 140ms.

Can the LTC2974 shorten the assertion time any further?

Best regards,

  • Hi yoichi_mac,

    The PWRGD pin is based on ADC measurements of each of the channels, i.e. so the timing of the PWRGD’s assertion (high) is dependent not only on the TON_DELAY times but which channel is polled last.  The ADC goes from channel to channel, making Vout measurements. These are compared against the POWER_GOOD_ON thresholds. The PWRGD pin will be asserted whenever the ADC “answers” are all in. The ADC loop time is ~90ms. Once input power is applied to the LTC2974, there is a 30-35ms initialization time before the sequencer starts, then you can add the longest TON_DELAY to that.  So, the earliest assertion of the PWRGD pin will be 35+90 or 125ms after power is applied.  The pgood assertion delay adds additional time to this.

    Hopefully this answers your question.


  • Thank you for quick reply.

    All of my questions were cleared up!