Problems with LTM4620A

Hi,

we have designed a supply system for a FPGA with the LTM4620A power module, for generating a output reference of 0.95V / 26A with the parallel mode (both outputs are tied together) from a 12V input source. The circuit is showed in the image below.

Simulation in LTSpice works correctly, however, we are experimenting a switching noise in the output voltage. Here I attached some photos:

Some relevant observations:

- Output average voltage is lower than expected. The resistor 102k should fix the output value around 950mV, however the average value is 761mV

- Output voltage presents a switching noise, near from the programmed frequency (120k sets a 500khz conmutation frequency)

- INTVCC value is correct and without noise.

- TRACK/SS presents a negative value!!!! (This is not seen in simulations). Average value -419mV

- VFB also presents the switching noise, average value 460mV and 276mV peak-to-peak.

- Rise time is different from desired value (around 50 us). It seems to rise as fast as possible.

I appreciate any help.

Best regards,

Antonio

  • 0
    •  Analog Employees 
    on Mar 6, 2020 11:47 PM

    Hi Antonio,

    Here are some suggestions.

    1. Could you please try reducing your frequency to 400 kHz? You can set that using a 95.3k FSET resistor. 

    2. When probing the output voltage and VFB, are there any probes connected to the SW node? If so, could you please try probing Vout or VFB alone to see if the noise goes away?

    Please let me know if any of these suggestions help. In addition, are you using a standard ADI demo board for your tests? If not, the problem could also be due to board layout. 

    Thank you!

    Sincerely,

    Liyao

  • Hi Liyao,

    thank you very much for your answer.

    1) First we tested at 250KHz, and the ripple amplitude was higher than with 500KHz. We even had an important noise in the input current (measured in the power supply output. With the frequency increase, we reduce both ripple amplitudes.

    2) SW nodes are unconnected. We tested VOUT, VFB, VTRACK, VCOMP individually, and the behaviours are as the showed in the pictures.

    3) No, we design a board using LTM4620A and LTM4644 chips, with a high consideration on datasheet layout advices. We tested our layout in other board and the signal response was correct, as designed (0.95V +- 30mV aprox., with 250 KHz)

    We keep waiting for more suggestions.

    Thank you very much,

    Antonio

  • 0
    •  Analog Employees 
    on Mar 9, 2020 4:37 PM in reply to antman

    Hi Antonio,

    If the same issue does not occur on every board tested, could you please try reflow the module according to the PCB Assembly and Manufacturing Guidelines below? It is possible that the module is not soldered very well.

    https://www.analog.com/en/products/landing-pages/001/umodule-design-manufacturing-resources.html

    Thank you!

    Sincerely,

    Liyao

  • Hi Liyao,

    after a lot of tests, we thought that is the problem, however, we performed a lot of simulations in LTSPICE with possible assembly errors, and we didn't find a conclussion. The strangest issue is the -400mV on TRACK/SS pin. We also think, that it can be a chip integrity issue.

    About our design, what do you think about the feedback using DIFFOUT in VOUTS1, and VOUTS2 is left open?

    The board is currently in our assembly company, we will answer when we have results / conclussions.

    Thank you very much,

    Antonio.

  • 0
    •  Analog Employees 
    on Mar 24, 2020 4:56 PM in reply to antman

    Hi Antonio,

    In your application, there is no issue with connecting DIFFOUT to VOUTS1 and leaving VOUTS2 open as in your simulation setup. VOUTS1 and VOUTS2 are used to provide output voltage information to the IC. As VOUT1 is in parallel with VOUT2, as long as either VOUTS1 or VOUTS2 is connected to DIFFOUT or directly to the output, the IC can get that information.

    Sincerely,

    Liyao