I have a question with regards to CBYP use on the source pin of LT8672.
Datasheet page 10 specifies not to use Capacitance more than 60nF include PCB . Could you please let me know how to consider Battery as battery may have capacitance.
The LT8672 does not require any bypass capacitor at the SOURCE pin (CBYP in the Block Diagram). Should such a capacitor be needed for other reasons, for example as part of an up-front EMI filter, its capacitance must not exceed 60nF; otherwise, the gate driver’s stability may be impaired. This applies to the total capacitance connected to SOURCE on the PCB.
With best regards and wishes
The reason why there is a limitation of 60nF is a little bit complicated. The main concern is this input cap will oscillate with stay inductance of MOSFET. In some load step conditions, if input cap is too large, the source node will be allowed to vary with sufficient amplitude and time to cause Fast-pull up(FPU) and Fast-pull down(FPD) conditions periodically. However, If the infinite input cap is used, such as battery model, this oscillation can be neglected.