Post Go back to editing

# ADM7150 input capacitor choice (ESR, Bias voltage variation)

Hi,

I am designing a 5V supply using ADM7150, with an input voltage of 9V. I am having a conflict with the choice of the input capacitor. According to the datasheet (table 2), the minimum Cin should be 7uF, with an ESR<0.2Ohm. This should be guaranteed in the whole operating range.

To determine the minimum capacitance I should consider temperature variation, DC bias variation.

My problem is that the DC bias variation of a typical MLCC capacitor is very large, so it does not seem possible to satisfy de 7uF minimum requirement by using a single 10uF. In addition, the typical ESR of these capacitors close to DC is much larger than the 0.2Ohm minimum.

To give an example: in the ADM7150 evaluation board, they use a single input capacitor is Murata GRM21BR61C106KE15 (X5R, 10uF, 0805, 16V).

From the Murata SimSurfing application I get the following data:

This means that at 9V for example, there is approximately an 80% reduction in nominal capacitance, that is, the capacitance is approximately 2uF. Also, the ESR falls below 0.2Ohm at 800Hz.

My question are:

1) Is there a frequency range in which I should look at the ESR?

2) Should I add multiple input capacitors in parallel until the parallel ESR is below 0.2Ohm in the whole range and the total input capacitance is above the minumum 7uF (considering also the tolerance and temperature variation?

3) Why does the evaluation board use a single capacitor?

4) What happens to the ESR if a mix capacitors with a different ESR? Is it the parallel connection of all the resistors?

Thank you very much in advance!

• Hi Andresaltieri,

To meet the minimum input capacitance of 7uF, what you can do is use a capacitor with higher voltage rating or bigger size.

With regards, to the ESR, adding capacitors in parallel would decrease the total ESR value.

Best Regards,
Alex

• Thank you for your reply. I realized that placing several capacitors will produce the parallel connection of the impedances of each one, so there will be a reduction of the total resistance but the actual reduction may be small, depending on the total impedance of each capacitor.