LT1761MPS5-3_3 LDO min load req


I am using LT1761MPS5-3_3 LDO in one of the design. Following is the scenario

When no Load = 3.3V stable

actual load = ~3-4mA (output is going to 7.4V)

and dummy load of ~5mA or more = 3.3V stable.

Now I had used this IC on prototype as well and there I didnt face this issue.

I am using this IC in a 4-20mA current loop design where this LDO is used to power up the DAC  DAC161S997RGHT and other isolator ICs.

Now if I put dummy load, I am getting stable output voltage and stable operation or current loop untill I command the current which I put as dummy load. i.e. let us say I kept 5mA dummy load to stablize the output of my 3.3 LDO,

Whenever I command (using SPI) > 5mA current command, I can see exact current in the loop. however when I am commanding for 5mA or less, I see always 5mA.

Please let me know if I am missing anything here.

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