LTM4686 question

Hello valcine,

The observation of 100mV exist when no load is connected.

Bleeding resistor can be added if needed.

Thanks. 

Dear Haihua:

Thanks for your reply.

May I ask why is this 100mV exist always?

Is there any other leakage path in the LTM4686?

Due to My load is FPGA, the 100mV can't let FPGA work, but as you know, FPGA is the core device, I won't let the exist 100mV voltage cause any problem, so bleeding resistior maybe not a good solution.

Hello Valcine,

Please try to use a 1Kohm as a bleeding resistor to eliminate the this 100mV. 

If the Vo=0.8V and this 1K bleeding will generate 0.8mA.

This 0.8mA is 0.008% out of 10A. 

The reason of the 100mA exist is due to there is a leakage current from SW node.   When at no load condition, SW node directly connects Vo and charges the output cap and generate the 100mA.

Thanks, Haihua