Hello,
attached data is an LTSpice model test setup of LT4363-2 based cirquit, exposed to IEC 61000-4-5 8/20us 2kV/1kA pulse.
Simulation data demonstrates a considerable current pulse from GATE pin to GND pin of LT4363 immediately after surge onset, for which no valid path exist as per datasheet block diagram. In 1us a normal pulse starts from GATE pin to SNS pin, evidently due to current fault, which seems to terminate the pulse to GND pin.
Is it an intended behavior?
Regards,
Sergey