AD8452 CLFLG

Now I try to change the size of R-clvt resistance from 3K Ω to 15K Ω, and find that CC charging current can be set to 12A without cut-off (CLFLG = = 2.4V at this time);

however, CC discharge current can only be set to about 3A and cut-off (CLFLG = = 0V at this time).

What is the relationship between CLFLG  PIN and charge discharge current?

Hello Shaolei,

What is the value of the Current Limit sense resistor RCL?  The CLFLG pin is open drain and is pulled up to VREG (5V).  Are you using a scope to measure the CLFLG voltage or a multimeter?  CLFLG would only be pulled low during a overcurrent condition in either charge or discharge modes.  Please refer to page 30 of the AD8452 data sheet for information on selecting RCL and R-clvt.

Cheers,

George

Hello Shaolei,

What is the value of the Current Limit sense resistor RCL?  The CLFLG pin is open drain and is pulled up to VREG (5V).  Are you using a scope to measure the CLFLG voltage or a multimeter?  CLFLG would only be pulled low during a overcurrent condition in either charge or discharge modes.  Please refer to page 30 of the AD8452 data sheet for information on selecting RCL and R-clvt.

Cheers,

George

Thank you for your reply, George. 

my RCL resistance is 3mΩ, and the inductance used is 6.8 μ H (saturated current 32A); I use a 6-and-a-half digital multimeter to measure the voltage;

What I want to know is: why is the maximum discharge current that ad8452 can set different from the maximum charge current on our PCB? When the hardware conditions are the same, the discharge current can only be set to 3A, and the charging current can be set to 12A, then CLFLG will change to 0V.

Best wishes,

Shaolei

Hi Shaolei,

CLFLG is a digital output.  Try monitoring it with a scope instead.  You may find some additional information that can help.  While monitoring CLFLG, try also monitoring at the same time with a differential probe across CLN and CLP.  You may find that there are overcurrent situations where you do not expect them.  If you are able to share your design publically, that may help.  Is your design based on the design shown in UG-1181?  Thanks.

Cheers,

George

Yes, my design is based on ug-1181. The design drawing is as shown in the figure, and the red circle part of the components is removed.

The attachment is the PCB design of our ad8452 part.

Best wishes,

Shaolei

PDF

Hello, I recently tested this PCB board with an oscilloscope and found some strange phenomena:
1. When 2A charging, the cflag is relatively stable at 5V;
2. When charging at 5A current, the high and low level of cflag changes continuously, and the duty cycle gradually changes from high to low, as shown in the attachment figure;
I would like to know why there is such a change and which device parameters need to be changed to keep the cflag at high level.

best wishes!

Hi，George.
    I am Shao lei colleague, I test his circuit board that I found something strange.I set up 2A  constant   current to test two channel, the current-limiting resistance of CH3 is 3kΩ and the current-limiting resistance of CH4 is 15kΩ. I find the phenomena of these two channels are as follows.

The upper computer displays the current of the two channels:

CLFLG pin level for channel 3:There is overflow


CLFLG pin level for channel 4: It's always high 5V

What I want to ask is why does this happen? The phenomenon of overcurrent appears.,the upper computer shows that there is 2A, but the other channel is the opposite