HI,

I tried to test the output voltage of CLFLG pin. After recording the data, I found that the voltage of CLFLG pin reference DGND is not as described in datasheet, only 0 or 5V. When CC mode is set and the current is 1.5A, 4.8V is measured. Then with the increase of the current, the output voltage of CLFLG decreases continuously. Until 7.4A current is set, CLFLG outputs 1.9V, and then it changes to 0V in a short time(about 1s). At this time, the current stops;

I ask this question because we use our own PCB. In CC charging mode, voltage of CLFLG  will change to 0V when the current is set about 7A; in CC discharging mode, CLFLG output voltage will change to 0V when the current is set about 3A; at this time, the current will stop outputting；

We hope that the charge and discharge of this PCB can meet the requirements of 5v12a；

We want to know whether our PCB design or component parameter selection is incorrect, or CLFLG pin is just like the above?

The following figure is the circuit schematic diagram we designed:

Best wishes

• Now I try to change the size of R-clvt resistance from 3K Ω to 15K Ω, and find that CC charging current can be set to 12A without cut-off (CLFLG = = 2.4V at this time);

however, CC discharge current can only be set to about 3A and cut-off (CLFLG = = 0V at this time).

What is the relationship between CLFLG  PIN and charge discharge current?

• Hello Shaolei,

What is the value of the Current Limit sense resistor RCL?  The CLFLG pin is open drain and is pulled up to VREG (5V).  Are you using a scope to measure the CLFLG voltage or a multimeter?  CLFLG would only be pulled low during a overcurrent condition in either charge or discharge modes.  Please refer to page 30 of the AD8452 data sheet for information on selecting RCL and R-clvt.

Cheers,

George

my RCL resistance is 3mΩ, and the inductance used is 6.8 μ H (saturated current 32A); I use a 6-and-a-half digital multimeter to measure the voltage;

What I want to know is: why is the maximum discharge current that ad8452 can set different from the maximum charge current on our PCB? When the hardware conditions are the same, the discharge current can only be set to 3A, and the charging current can be set to 12A, then CLFLG will change to 0V.

Best wishes,

Shaolei

• Hi Shaolei,

CLFLG is a digital output.  Try monitoring it with a scope instead.  You may find some additional information that can help.  While monitoring CLFLG, try also monitoring at the same time with a differential probe across CLN and CLP.  You may find that there are overcurrent situations where you do not expect them.  If you are able to share your design publically, that may help.  Is your design based on the design shown in UG-1181?  Thanks.

Cheers,

George

• Yes, my design is based on ug-1181. The design drawing is as shown in the figure, and the red circle part of the components is removed.

The attachment is the PCB design of our ad8452 part.

Best wishes,

Shaolei