My customer has two questions for LT4293 PD application.
1. The description section of the LT4293 data sheet states that LT4293 includes undervoltage lockout. But there is no further explanation.
Could you please provide the operation condtion of the LT4293 undervoltage lockout function ?
2. Does the LT4293 have input overcurrent protection ?
Or can the customer implement input overcurrent protection without using additional ICs ?
The undervoltage behavior is specified by IEEE and listed in the Electrical Characteristics in the datasheet. The LT4293 is guaranteed to turn on at 37V and turn off at 30V, with a minimum of 3V hysteresis…
The undervoltage behavior is specified by IEEE and listed in the Electrical Characteristics in the datasheet. The LT4293 is guaranteed to turn on at 37V and turn off at 30V, with a minimum of 3V hysteresis.
The upstream PSE provides input overcurrent protection to the LT4293. This allows this IC to interoperate with IEEE 802.3bt, LTPoE++, and UltraPWR PSEs. The T2P pin indicates the Allocated Power from the physical layer Classification for either IEEE 802.3bt or LTPoE++. If the PD draws more power than allocated, the PSE will limit the port current or disconnect the port. The PD’s inrush profile is programmed with a gate capacitor, allowing the designer to configure their desired current and timing; I recommend starting with 47nF. Finally, PWRGD should be used to enable the downstream load. PWRGD is high when the port voltage is above 37V and inrush has completed. PWRGD will indicate if the port is collapsing due to the PSE limiting the port current. It can be used with a low-side MOSFET to enable and disable a non-capacitive load like LAB_TEST_VOUT- on LT4293’s demoboard.