Hello Analog Devices' support team,I recently started doing EVM testing for my personal project using your Hotswap component - ADM1272. During the component capability tests in FET SOA retention, results were discovered that do not converge to the data sheets and do not even converge on the theoretical calculations I have performed.In terms of information about the set-up:I fed the component at 30 V, limited the ISET current to 5 A (by placing the respective voltage divider in the relevant pin in the component),And I set the Load Resistor of 2.6 Ohm. According to the calculation by the way of operation based on the pin "ISTART" - we accepted, by applying the load (by switching on using another FET for switching operation) for current damping time of about 0.8 msecWhat we actually got:We got by measured the V_gate, V_ds, and the Output current - is 416usec delay in the operation of the gate of the FET, which in turn caused for delay in the operation of the current damping!
Moreover:We performed the same tests on different loads, including - shortcut (0 Ohm), 1.5 Ohm.In those test - we got as expected, and convergence for what we calculated.I would like to know if you can explain this phenomenon, and try to explain the above mismatch for this load.
I will try to upload lately the screenshot of the oscilloscope of the measurements
Thank you very much,Evyatar
The ADM1272 has three factors that limit the start-up current and timing. The first, as you have observed, is the ISTART pin, which sets the start-up current limit, which is normally NOT engaged…