LTC6804-1 stack communication issues

I’m working with the LTC6804-1 on a project for a large battery pack for a client that’s intended as a UPS for data center applications.

 They are using 4 boards with 8 cells per board (schematic attached) connected and series and then attached to an LTC6820 and from there to a controller via SPI bus.   I'm running the SPI bus at 125KHz (which I would think should be plenty slow for communicating with the chips).

 I’m having a number of issues and hope you can help me sort these out or point me in some direction.  I’ll describe each below:

1) I can read the cells on the 1st chip in the stack just fine 100% of the time.  However, I’m only rarely able to read the cells on the 2nd chip (i.e. PEC valid) though PDFwhen I do read it the cell values are correct.  For the time being I have 2 cells installed on both chips (the same 2 cells) and the chip is powered by an isolated 15v DC-DC through R49 (100 ohm resistor).

2) However, I can’t seem to be able to read the two GPIO pins reliably with the ADCVAX command or with the ADAX command.  I noticed that the VREF1-2 pins are turning on for ~200ms and then turning off (likely due to the REFON bit not being set in the CFG0 register, which would make sense).   Though I am writing an 0xE4 to that register, but when I read that register back I read 0x02 on the first chip, but 0x06 on the second chip (which would be correct, though VREF1-2 are doing the same thing on that chip).

 Here’s what I’m doing in the firmware:

  • On startup I’m waking the chip by sending 120  bytes (0xFF) and then waiting 1.5ms (like your demo code WakeUpSleep ),
  • Then before every command I send a single byte (0xFF) and wait 100us (sort of like your demo code WakeUpIdle ),
  • After the wake-up I write the configuration registers for all chips (valid PECs, etc.)
  • Then I read the configuration registers from all chips.  If all the received PECs are correct I move on (but this is where the 1st chip reads back 0x02, but I ignore that at the moment),
  • Then I go into a loop where I read the cell voltages:
    • Send ADCV command,
    • Wait 350ms,
    • Read RDCVA, RDCVB, RDCVC, RDCVD and validate PECs and then parse out cells from each board,
    • Wait 50ms,
    • Start sequence over reading ADCV,
  • I keep track of the current state and set an error bit if there’s an issue and also have an error counter.  If I run the above with just the 1st chip in the cell stack I get no errors and read the cell voltages reliably all the time.  However as I noted above I can rarely read the cells in the second chip in the stack successfully, the PEC is invalid on nearly every read.

 The datasheet doesn’t have a lot of details on the commands, the sequencing, etc.   And, I couldn’t find any application level code showing use with your library files (and near as I can see I’m doing most of the same things).

By the way, I’m writing the following values to the configuration registers:

CFG0 => 0xE4

CFG1 => 0x00

CFG2 => 0x00

CFG3 => 0x00

CFG4 => 0x00

CFG5 => 0x00

 When I read them back registers 1-5 are 0x00 as expected, but as I noted for CFG0 on the 1st chip I see 0x02 and on the second chip 0x06.  I’m only using 2 of these boards at the moment (I figured once I had 2 of these working I could add more).

Any thoughts or help is appreciated,

Dave.

  • The issue with communication turned out to be the SPI bus speed.  I was running it at 125KHz and that didn't work for the isoSPI bus.  Running it at 500KHz or 1MHz resolved the communication issue and now I can read cell voltages from both chips without any issues.

    However, I'm still having issue trying to read thermistors from the GPIO pin (using VREF2 and a 10K series resistor and 10K thermistor). 

    a) If I write 0xE4 to CFG0 to both chips in my stack when I read CFG0 back the first chip responds with 0x02 and the second chip with 0x06. In this mode the thermistor value on the first chip reads correctly and VREF2 is turned off between samples.  VREF2 on the second chip is on solid at ~3v (as we'd expect) but the thermistor value is never read successfully (value of ~76-78) and even without a thermistor present the GPIO pin is a 0v?

    b) So, if I write 0xE0 to CFG0 to both chips when I read back CFG0 they both return 0x02 as we'd expect, and VREF2 on both chips is turned on during sampling and off otherwise, but now neither of the chip reads the thermistors correctly (I get a value of ~76-78).

    Any thoughts?

    Dave.

  • A few more datapoints...

    a) Apparently I have to delay 2 seconds after I send the WRCFG message to work and for the one chip to report GPIO settings correctly.   If I wait less than that, then both chips report 76-78 on the GPIO pins.  If I wait longer up to 3.5 seconds still only one chip responds...

    b) I've setup the cell balancing function and when turning balancing on/off (since it uses the configuration registers and I don't have the 2 second timer there, as soon as I send the WRCFG message with the cell balancing bits set the GPIO ports for the working chip stop working (as they do without the 2 second delay so no surprise), but more perplexing is that if I turn on balancing for the 1st cell of the 1st chip, balancing is turned on for the 1st cell of the 2nd chip (I only have two chips installed at the moment).   If I look at the SPI buffers the TxBuffer has the 1 bit set in the first batch of configuration registers, but in the RxBuffer that bit appears in the second batch of configuration registers.

  • A further note.  If I don't write the configuration registers after powering up then the thermistors on all boards work just fine and I can read the cells, etc.   Everything works until I attempt to balance the cells (which writes the configuration registers). 

    If I add a 2 second delay between writing/reading the registers when balancing then balancing doesn't work (all cells are set to balance regardless of what I write) but the thermistors continue to work.

    Without the 2 second delay, balancing works (though the for the wrong chip (if I setup to balance cell 'n' on chip 1, I end up balancing cell 'n' on chip 2 (only 2 chips in my stack now)), but the thermistors stop working (report 76-78 for GPIO1-2 on both chips)).

  • 0
    •  Analog Employees 
    on Sep 5, 2019 1:20 PM in reply to Dave94024

    Hi Dave,

    I see that you are using GPIO 1,2 for reading the thermistors.

    In order for you to read these values, you must turn off the internal pull down on these two pins.

    As per your code you have set the GPIOx bit to 0 for these pins, You might want to change it to 1. Your new CFG0 value should be 0xFC. 

    The reason it is working after 2 seconds and without writing configuration is that the default value of these pins is 1 and hence the pull down is off.

    If you want to read these values after setting the DCC bits then please set CFG0 to 0xFC in that write command as well.

    Regards,