Hello. I have a question about this converter and if I should use tantalums or ceramic capacitor (bank) on its output.
I'm a digital design engineer and have always followed datasheets,examples, eval boards, simulators etc for the output L-C stage. I've always used tants and they've worked just fine. Someone has designed a supply with this DC-DC controller and put 4u7H and 2mF of ceramics on the output (to power an FPGA core voltage). To me this feels wrong in that the examples and EVM board use say 0.47uH and 660uF L-C output stage. This runs on the EVM just fine.
Current ripple into the tants looks OK, my only query is that at beyond 200 KHz, the tants (used in the EVM) and almost all over tants, start to become inductive and hence no longer capacitors. This then makes me question why tants were and still are used on 500 KHz+ DC-DCs. How can they be used....
TBH, I want to stick with tants as per the EVM, yet the datasheet is saying that tants are no good beyond 100 KHz.
In 500kHz range, the tantalum cap we used on our EVM is still in capacitance range. So the capacitance is dominant. Meanwhile, the tantalum cap is used for DC output filter. The AC ripple is very small comparing with the DC bias value. For the high frequency switching noise, we want to have a low impedance path to filter them actually.
You can take our EVM design a reference for your application.