Hello , I have some questions regarding adp1071-2 evalutaion board for 36 Watt (12V1 Output).
1) Is there a Ltspice model for the adp-1071-2 controller ? and if not , can you create one?
2) is there a minimum load condition for the adp-1071-2?
3)what is the meaning of "Forced ccm operation "?
4) the datasheet represent application with input voltage between 4.5 to 60 volt.
the block diagram of adp-1071-2 shows that VREG1 is created by the output of internal LDO to 8 V.
how is it possible to create this 8 Volt at VREG1 if the input is less then 8 volt ( even 4.5 volt)?
5) how does the Rsoft start which is connected to the Gate at the primary influence the rate of duty cycle? it is only a "voltage divider" at the output of the controller?
thank you very much for your help!