LT8609S ext clock using LTC6902 with SSFM

Looking to drive three LT8609S regulators from a LTC6902 with SSFM.  This appears fairly straight forward ... float DIV and PH (each bypassed with a 1nF capacitor), 10.5K SET for a 630kHz Fmax, 22K MOD for a 9.55% SSFM.  Connect OUT1 to the first LT8609S SYNC, OUT2 to the second LT8609S SYNC, and OUT3 to the third LT8609S SYNC.

The first question is regarding connecting the OUT to the SYNC.  Looking at how the LTC6902 is used to drive other LTC regulators I see in the LTM4627 datasheet that OUT is connected directly to SYNC, however the LTM4627 eval datasheet DC1668B shows each OUT to SYNC connection going through a 100 ohm resistor.

What is the significance of the 100 ohm resistor (EMI or something else)?

Is it recommended when using the LTC6902 to drive the LT8609S?

Also the LTC6902 notes that the SSFM frequency transitions are slowed by a 25kHz filter which suffices to work with regulators using a PLL so long as the PLL bandwidth exceeds that.

With Fmax set to 630kHz and 9.55% SSFM that means Fmin will be around 570kHz so allowing for tolerance it suggests setting the LT8609S Rt for 500kHZ (which also sets the slope compensation).

Will the LT8609S stay locked to the LTC6902S if the ext clock has SSFM?

Is there a limit to the SSFM spread to which the LT8609S will stay locked?

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    •  Analog Employees 
    on Aug 7, 2019 6:05 AM

    For LT8609S, SYNC frequency should be equal to or above RT set frequency.

  • Yep ... the datasheet mentions that.  The datasheet doesn't mention how well the device can track a changing frequency.  What are the restrictions regarding the LT8609S locking on to an external clock that uses SSFM? 

    How rapidly is the clock allowed to change?  The following is mentioned in the ltc6909 clock generator datasheet:

    Depending on the specific frequency synchronization method a switching regulator employs, the modulation rate must be within the synchronization capability of the regulator. Many regulators use a phase-locked loop (PLL) for synchronization. For these parts, the PLL loop filter should be designed to have sufficient capture range and bandwidth.

    Unfortunatey there doesn't seem to be any information in the LT8609S regarding the frequency synchronization method it employs.

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  • Yep ... the datasheet mentions that.  The datasheet doesn't mention how well the device can track a changing frequency.  What are the restrictions regarding the LT8609S locking on to an external clock that uses SSFM? 

    How rapidly is the clock allowed to change?  The following is mentioned in the ltc6909 clock generator datasheet:

    Depending on the specific frequency synchronization method a switching regulator employs, the modulation rate must be within the synchronization capability of the regulator. Many regulators use a phase-locked loop (PLL) for synchronization. For these parts, the PLL loop filter should be designed to have sufficient capture range and bandwidth.

    Unfortunatey there doesn't seem to be any information in the LT8609S regarding the frequency synchronization method it employs.

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