Hi,
I have a legacy design using the LTC3705. The LTC3705 locks up at startup when the supply voltage rises too slowly. I can replicate the problem by setting the current limit on my lab power very low. After a while I will then increase the current limit, but the LTC3705 stays locked with no switching on the gate outputs. I think the problem may be related to trickle charge mode.
Question:
How do the LTC3705 detect "trickle charge mode? From the block diagram it seems that trickle charge is mode is selected when VCC > (NDRV-0.6V). In our application VCC is supplied from a 12V linear regulator. Since VGDUV is 13.4V in trickle charge mode we want to avoid this mode. To stay in normal mode, this would require VCC < (NDRV-0.6V). In our application this equals NDRV > 12.6V. I measure 12.0V at the NDRV pin. This makes sense if the chip is pulling NDRV low to turn off the external nmos transistor. This again explains why the chip is "dead".
Have I understood this correctly?
Do you have a suggestion on how to force the chip to not be in trickle charge mode?
