The PWRGD signal on the LT3065 stay high when the SHDN pin is low, where the datasheet state that it should remain low if the output is less than 90% of the nominal output value.
When the SHDN pin is set to high, the PWRGD pin will pulse low for 3 ms and then return to high. PWRGD pins detects fault like current limit but doesn't reflect the output status which is not good for power sequencing.
It is a known issue for that device?
NOTE : We have tested the LT3065IDD#PBF