I would like to use LT3094/LT3045-1 for positive and negative power supply. The output voltage is +- 12V but the input may be +-15V or +-18V. We are considering putting a heat sink beneath the LDOs (i.e., on the 4th layer).
But the reference designs of LT3094 and LT3045-1 suggest that a C1 being placed underneath for EMF current flow, which maximize the PSRR performance. Though, this capacitor make placing the heat sink non-feasible.
We would like to known, if we were maintaining the PSRR performance, where should we place this capacitor and why?