I want to design a variable power supply (10 to 24V) as a part of a test equipment and want to use the LT3081 because of its nice current limiting and monitoring features. My idea is to use a buffered DAC and connect it to the SET pin. Is this possible?
Thanks for the post. You can drive SET on the LT3081 with a DAC, but keep in mind that the LT3081 and similar LDOs require that OUT and SET are always close to the same voltage. That requirement is not well covered in the datasheets other than the +/- 25mA Abs. Max. SET Pin Current requirement in the case of the LT3081. The LT3081 is the most rugged of the LT308X series of LDOs so the LT3081 is more tolerant in this area in comparison to the other LDOs but keeping the OUT and SET voltages about the same is a good practice even with the LT3081. I show one approach to keeping OUT and SET the same in the image below:
Thanks. Do you mean (SET Pin Voltage (Relative to OUT, Note 6) .............. ±10V) from the LT3081 datasheet ? I'm wondering if the LDO enters the programmed or the internal current limit let say at 24V output and Vin = 30V then the SET Pin Voltage would be about 24V relative to OUT (Using a DAC or Rset). Will the diodes mentioned in Note 6 clamp the voltage in this case? LTSpice doesn't show a clamping behavior.
About your circuit, I think an additional resistor is needed direct after the OpAmp output to avoid current sourcing the load by the OpAmp in the mentioned current limitation scenario. What do you think?
Thanks for mentioning Note 6. I should have mentioned Note 6 from the LT3081 datasheet in my previous post so I show the note in the image below.
You are also correct about the +/- 10V abs. max. rating for the OUT to SET voltage and I highlight that abs. max. rating and the +/- 25mA abs. max. rating I mentioned in my original post in the image below:
I'm not surprised that you can't extract that OUT and SET are clamped with diodes in series with 400 Ohm resistors from LTspice.
I realize that the one approach I show above to maintain OUT = SET introduces some circuit complications like the scenario you mention where OUT pulls down the buffer amplifier output.