LTC6811 communication through I2C

Hello all:

We are trying to interface between LTC6811  and LTC2451 ADC  through I2C on gpio4 and gpio5 of 6811 module. The LTC2451 ADC will act as a temperature sensor so we can measure temperature for our battery modules. In LTC2451 data sheet, the ADC will output a 16-bit value when it detects a read command from the master. My question is, how do I initialize the I2C communication from 6811? From the datasheet, in my understanding, we have to:

1. write to the COMM register using WRCOMM command 

2. start the communication using STCOMM command

3. read the COMM register for data from LTC2451 using RDCOMM command

However I am not sure what I should put in the COMM register in step 1. I assume ICOM0 will be the start signal, D0 will be the address of LTC2451 + read bit, then what about the rest of the COMM register, specifically ICOMn and FCOMn? Can someone give an example of what the registers should look like, if i were to send a read command to the ADC? Thank you very much.

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  • 0
    •  Analog Employees 
    on Apr 22, 2019 2:22 PM over 1 year ago

    Hi,

    Good Questions!

    The read/write sequence for LTC2451 is mentioned on page 11 of the datasheet, please follow them to replicate the same on the COMM register. 

    ICOM - Can be  START or BLANK or NO_Transmit

    DATA - Can be ADDRESS or DATA to be read/written

    FCOM - Can be ACK or NACK or STOP+ACK or STOP+NACK 

    Please check which type of sequence you wish to implement and fill the COMM register accordingly. 


    For example, implementing "Figure 7. Write, Read, START Conversion" (page 11, datasheet)

    ICOM[0] - START ----- DATA[0] - 7bit ADDRESS + W(0) ----- FCOM[0] - ACK from SLAVE

    ICOM[1] - BLANK ----- DATA[1] - WRITE DATA(8bit)       ----- FCOM[1] - NACK from SLAVE

    ICOM[2] - START ----- DATA[2] - 7bit ADDRESS + R(1)  ----- FCOM[2] - ACK from SLAVE 

    Use WRCOMM to write the above sequence then perform STCOMM to send the COMM register to the I2C bus.

    Then once again re-write the COMM register with the sequence mentioned below. 

    ICOM[0] - BLANK              ----- DATA[0] - 8 HIGH BITS  ----- FCOM[0] - NACK from SLAVE+STOP

    ICOM[1] - NO TRANSMIT ----- DATA[1] - 8 HIGH BITS  ----- FCOM[1] - NACK from SLAVE+STOP

    ICOM[2] - NO TRANSMIT ----- DATA[2] - 8 HIGH BITS  ----- FCOM[2] - NACK from SLAVE+STOP

    The READ data will be replaced in DATA[0], rest of the comm register values are set to dummy values. After performing the RDCOMM command DATA[0] can be read. 

    I hope this example solves your doubt. For values of all bits of COMM register, please go through Table no. 52 on page 63 of datasheet.

    Regards,

    Abhishek

  • Thank you for your reply! From what you wrote earlier, why is the FCOM[2] NACK from SLAVE if the slave should be able to acknowledge the read command? Shouldn't it be an ACK from slave?

    And if I need to send the command to start conversion sequence listed in figure 5, is the below correct? the data read is 16 bits so there are 2 blank ICOM registers.

    reg.fields.ICOM0 = 0x6; //start signal
    reg.fields.D0 = slave_address << 1 | 0x1; //1 = read bit
    reg.fields.FCOM0 = 0x7; //slave generates ACK signal
    reg.fields.ICOM1 = 0x0; //blank
    reg.fields.D1 = 0x00; //blank
    reg.fields.FCOM1 = 0x0;  //master generates ACK signal
    reg.fields.ICOM2 = 0x0; //blank
    reg.fields.D2 = 0x00;  //blank
    reg.fields.FCOM2 = 0x9; //master generates NACK following a stop signal

  • Can you clarify what do you mean by "all the unused frames"? Since I am sending 24 clocks and 48 clocks, I would only need to send a portion of the COMM register inside my tx_data and leave everything else in the NO TRANSMIT and HIGH format.

    And with the 2 separate STCOMM sequences, I am sending a READ first then a WRITE, correct? The NO_TRANSMIT is under Write Codes and NACK from Slave is under Read Codes. So how would both codes be sent in the same frame?

  • 0
    •  Analog Employees 
    on May 23, 2019 5:46 AM over 1 year ago in reply to timothyle85

    Yes that is correct. By unused frames I mean whenever you do not need to send any data you have to keep those frames in the COMM register in the NO TRANSMIT and HIGH format.

    Which sequence are you trying to implement? I am sorry but I did not actually understand the last part, can you please clarify to which sequence you wish to implement?

  • Ok I see what you mean with the unused frames portion. But in regards to the last part of my response, I found that according to the LTC6811 datasheet(p.63), the NO TRANSMIT(0111) is a part of the write codes in ICOM only. And on the same page, NACK from Slave is part of the read codes (1111) in FCOM.

    So I wanted to clarify that I am going to perform a sequence of a write to COMM (NO TRANSMIT), a read from COMM (HIGH BITS), and a read from COMM (NACK from Slave+Stop). Does this seem correct? I have tried different combinations of this sequence and I still cannot read any data from my COMM register.

  • 0
    •  Analog Employees 
    on May 29, 2019 7:56 AM over 1 year ago in reply to timothyle85

    Hi, you are correct. NACK from Slave is a part of the Read code. I by mistake said its a part of Write code since the control bits for both Master NACK + STOP and NACK from Slave + STOP are the same as mentioned in the table(Table 52. Memory Bit Descriptions, page 63 of 6811 datasheet):

      

    Can you try this sequence to see if you are able to read the data?

    ICOM[0] - START(0110)    ----- DATA[0] - (7bit-Addr)+R ----- FCOM[0] - MASTER ACK(0000)

    ICOM[1] - BLANK(0000)   ----- DATA[1] - 8 HIGH BITS  ----- FCOM[1] - MASTER NACK(1000)

    ICOM[2] - BLANK(0000)   ----- DATA[2] - 8 HIGH BITS  ----- FCOM[2] - MASTER NACK + STOP(1001)

    Since as per Figure 5. Conversion Sequence (LTC2451 Datasheet) an acknowledgement is necessary after setting the address and read bit, so FCOM[0] must be MASTER ACK (0000), then further ACK is not required so Master NACK is used for the rest two FCOM bits.

    I hope this helps you understand the sequence. 

    Thanks,

    Abhishek

  • Thanks for the input. The first IC has been successfully read from the 2451 daisy chain. The following read sequence was used:

    ICOM[0] - START(0110)       ----- DATA[0] - (7bit-Addr)+R ----- FCOM[0] - MASTER NACK(1000)

    ICOM[1] - SDA LOW(0000)  ----- DATA[1] - 8 HIGH BITS  ----- FCOM[1] - MASTER ACK(0000)

    ICOM[2] - SDA LOW(0000)  ----- DATA[2] - 8 HIGH BITS  ----- FCOM[2] - SLAVE NACK + MASTER STOP(1001)

    However, data from the next IC is not being read. We've tried writing the sequence you posted before our read sequence with no success. We tried delays too but the other ICs are still blocked. The 2451 are organized onto separate boards connected by resistor addresses from LTC4316s. All are connected to the GPIO4 and GPIO5 ports of the 6811.

    Is there any adjustments that can be made to our sequence to allow the next IC to be read? 

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  • Thanks for the input. The first IC has been successfully read from the 2451 daisy chain. The following read sequence was used:

    ICOM[0] - START(0110)       ----- DATA[0] - (7bit-Addr)+R ----- FCOM[0] - MASTER NACK(1000)

    ICOM[1] - SDA LOW(0000)  ----- DATA[1] - 8 HIGH BITS  ----- FCOM[1] - MASTER ACK(0000)

    ICOM[2] - SDA LOW(0000)  ----- DATA[2] - 8 HIGH BITS  ----- FCOM[2] - SLAVE NACK + MASTER STOP(1001)

    However, data from the next IC is not being read. We've tried writing the sequence you posted before our read sequence with no success. We tried delays too but the other ICs are still blocked. The 2451 are organized onto separate boards connected by resistor addresses from LTC4316s. All are connected to the GPIO4 and GPIO5 ports of the 6811.

    Is there any adjustments that can be made to our sequence to allow the next IC to be read? 

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