Where can I find a recommendation for the number of vias in the PGND solder pad?
I have one more follow-on question for the LTC3853EUJ#TRPBF item about the solder pad:
What is the PD (power dissipation for this device when it runs from INTVCC? This question is based on the following text from the 3853fc.pdf, page 20, 1st Column, 2d para. "Power dissipation for the IC in this case is highest and is equal to VIN • IINTVCC.... For example, the LTC3853INTVCC current is limited to less than 50mA from a 24V supply in the UJ package and not using the EXTVCC supply..."
My question can further resolved/clarified if the responder to the question can simply indicate where in the 3853fc.pdf the 50mA, 24V Supply limitation is specified.
For PD question, there are 2 methods to generate INTVcc of LTC3853.
(1) INTVcc is stepped down from Vin by a linear regulator inside the IC. The power loss generated by INTVcc is equal to Vin*IINTVcc since there is a lineart regulator. Then according to the junction to ambient thermal impedance which is 33C/W, if the ambient is 85C and IINTVcc=50mA (Vin=24V). We can get the IC junction temperature is 125C, which is highest junction temperature of LTC3853EUJ#TRPBF. So in this case, IINTVcc can not exceed 50mA.
(2) When the voltage applied to EXTVCC rises above 4.7V, the INTVCC linear regulator is turned off and the EXTVCC is connected to the INTVCC. The power loss generated by INTVcc is equal to INTVcc*IINTVcc. Then according to the junction to ambient thermal impedance which is 33C/W, if the ambient is 85C and IINTVcc=50mA. We can get the IC junction temperature is 94C, which much lower than highest junction temperature 125C of LTC3853EUJ#TRPBF.
You can estimate the power loss of INTVcc based on which method you are using.
If the vias do not influence much the connection between PCB pad and IC pad and other inner traces, I recommend you to apply as more vias as you can.