LTC4266 test on sifos

Question

Hi, 
 We have a issue when LTC4266 test on sifos in auto mode . 
 PWRUP_time / PWR-On_Rise_time_Trise. The result is 14us<15us (Low Limit) in Af (15.4W Test) 
 
 We try increase Cin with no impact. 
 Does there any other method to lower down the rise time? (We will try gate resistance and Cds) 
 If it's margin fail. what's the impact ? 
 Thanks for your support.

dreyeslt · Accepted Answer

Hello, 
 ADI PSE demo boards have been tested internally against the Sifos at and bt tests with passing results. My suggestions is to obtain the DC1366, LTC4266 demo board ( https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/dc1366b.html#eb-overview ). Set the board for AUTO mode and perform the Sifos test to verify the test setup is correct. Alternatively, the single port equivalent is the DC1567 which may also be used. 
 Also, compare the design with the demo board schematic and confirm the component selection for each channel matches. 
 Lastly, capture a couple of voltage and current waveforms of the turn on. The first capture should Include the detection and classification in the time scale. In the second waveform, zoom in on the port turn on.)

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LTC4266 test on sifos