Power good resistor; default SS time; figure error

I have a couple question on the ADP1762:

1) If we don't use Power Good, can we leave the PG pin disconnected?

2) What is the default startup time with no capacitor connected to SS? The specifications table says 0.6msec. Formula (1) on pg 11 calculates to 0.1msec. Figure 25 I think indicates 0.6msec but both the time scale and the use of uF instead of nF I believe are wrong.

Thank you,

Ben

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  • Hi Ben,

    1. The PG pin is an open drain connection. If not used, leaving it open is just ok but tying it to GND is better.

    2. Figure 25 of ADP1761, ADP1763 is correct. Please refer to that. Equations 1 and 2 are applicable above a certain Css (Css > 10nF) only. If Css is 0nF, then that is not implementing a soft start, so Equation 1 and 2 will not be true. We will correct the ADP1762 datasheet.

Reply
  • Hi Ben,

    1. The PG pin is an open drain connection. If not used, leaving it open is just ok but tying it to GND is better.

    2. Figure 25 of ADP1761, ADP1763 is correct. Please refer to that. Equations 1 and 2 are applicable above a certain Css (Css > 10nF) only. If Css is 0nF, then that is not implementing a soft start, so Equation 1 and 2 will not be true. We will correct the ADP1762 datasheet.

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