I have designed a set of LT8614 based switching regulators. There are nine individual converters that all operate from 24VDC. Five converters output 12V@750mA and four output 15V@150mA. I drive all converters from an 8 phase clock generator with one clock output shared among two of the converters. They are driven at 2MHz.
The regulators use 6.8uH output inductors and this was a compromise as the duty cycle is either 50% or slightly greater given the Vout/Vin ratios.
All nine converters use a dedicate EMI input filter identical to that shown in the data sheet example on page for an ultralow EMI converter. In my initial tests, I saw good steady state behavior with a lab supply and controlled turn-on. Later, I started to see chip failures, either open or shorts at Vin, when I began transient input testing with a toggle switch fed from 24V.
I reviewed the literature and my design and came to two conclusions. One, the input X5R ceramic capacitors, in conjunction with the input filter was causing input spikes that were above the 42V Vmax rating. So I added a TVS clamp, Micro Commercial SMBJP6KE30A-TPM which has a max clamp voltage of 41.4V. The second realization is that my input capacitors were SM1210 and were not as close to the part body as recommended in the eval design. So I added 0603 1uF, 35VDC , X5R caps directly from the two Vin pins to ground.
In this configuration, with nearly ideal Vin bypassing and an added input TVS, I could subject the loaded regulator to input switch toggles without fail. However, once I removed the load from the regulator it was damaged by one switch cycle.
What am I missing here? I think my layout with added input caps is pretty reasonable given the data sheet guidance. Could the fact that the converters are driven by the external clock be part of the issue. Is there are power-up clock turn on sequence that needs to be maintained. By the way, all converters use the EN/ULV pin to turn on at about 19-20V.
I can provide more info as required but this problem is critical and I need to find out what I am doing incorrectly.
Thanks for the help,
During the power cycle test, if the output voltage is higher than the input voltage (which should not happen to the step-down buck regulator), large reverse current into SW pins may cause damage. Please…
During the power cycle test, if the output voltage is higher than the input voltage (which should not happen to the step-down buck regulator), large reverse current into SW pins may cause damage. Please monitor the inductor current to confirm if there’s reverse current in the test.
Yes, there is reverse current because the 15V output is very lightly loaded and the 24V input seems to fall faster than the output due to other loads on the bus. I see that there is a solution for protecting against reverse input voltage in the data sheet (Figure 4). Is this a possible solution? Or, can the Switch pins be steered with a Schottky diode to the Vin pins?
Also, I have a 30V input TVS but I have not checked to verify that the input voltage coming from an external EMI filter never goes negative. Could an input negative voltage spike cause catastrophic damage? If so is the Figure 4 solution the best? Can the EN/UV divider be fed from the diode output instead of from the raw 24V input?
Thanks in advance for your help,