ADP1047 predetermined loop BW

I read some answers such as "since ADP1047 is designed for PFC, its loop bandwidth is slow".

This is how the traditional boost circuits work.

But why would you predestine a whole new part for such a narrow application?

This slow BW comes from the fact that the output of ALL 60  Hz single phase has awful line harmonics.  Even gazzillion mF wont kill that . BUT there are new topologies that do not have this limitation.

So then how can I modify this predestined limitation?

What is the way to design loop BW according to the power stage? Through the GUI?

BTW:  can multiple ADP1047 chips be synchronized? How?

thnx

robin

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  • Hello Robin,

    The ADP1047/8 was released in 2012 and is for single phase, interleaved and bridgless boost PFCs.

    Can you please give me an example where you want a very fast voltage loop? You can increase the bandwidth of the voltage loop as much as you like but  there is a limitation in the current filter design that does not allow you to place the zero beyond 50Hz.

    To answer your other questions:

    1. Yes, the filter settings are programmed through the GUI

    2. For SYNC, it is possible to SYNCronize 2 ADP1047/8 together using the SYNC pin.

    Lt. Comm. Data.

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  • Hello Robin,

    The ADP1047/8 was released in 2012 and is for single phase, interleaved and bridgless boost PFCs.

    Can you please give me an example where you want a very fast voltage loop? You can increase the bandwidth of the voltage loop as much as you like but  there is a limitation in the current filter design that does not allow you to place the zero beyond 50Hz.

    To answer your other questions:

    1. Yes, the filter settings are programmed through the GUI

    2. For SYNC, it is possible to SYNCronize 2 ADP1047/8 together using the SYNC pin.

    Lt. Comm. Data.

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