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LTM8029 RUN Pin issue

Hi everyone,

I am using two units in my design of the DC/DC step-down converter LTM8029 (link) to generate two different voltages. The first one is -5V and the second one is 4.5V. The way that the IC is connected on each of them is as shown below...

The only difference from my design is that both RUN pins are connected to an external controller to switch them on and off as needed.

The issue is the following: I can switch on and off the regulator with positive output through the RUN pin, but not in the case of the regulator with -5V output. It stays in a kind of latch condition which I can't get to understand...

I have two boards (each of them mounts both regulators), and in both I am having the same issue.

But more surprisingly, I have decided to run some simulations on LTSpice and I can see the same issue there. Any ideas as to why this may be happening?

Many thanks in advance!

Best regards,


[edited by: rhdp1 at 8:45 PM (GMT -4) on 28 Apr 2022]
  • Hi Pascual,

    Did your circuit has rising threshold voltage? The lower resistor also serve as pull down resistor once you turn-off the run pin. Please implement the suggested circuit below from data sheet and check if the converter will still latch. 



  • Hi Pascual,

    I tried to simulate LTM8029 inverting circuit and I was not able to turn-off the converter using external drive. My previous comment will not also solve the issue.

    When LTM8029 is at inverting output converter mode, the GND reference of RUN pin become the negative output voltage. This mean that RUN pin is seeing |Vout| + the applied voltage. To change the GND reference back to main GND, you need to use a level-shifting control circuit. A level-shifting control circuit is required when the internal ground reference potential of the IC is not the system ground.

    Here’s an example of LTM8029 inverting circuit with level-shifter.

    Simulation Result.

  • Hi reyjr,

    Many thanks for your reply. That makes total sense now. I have resimulated with my expected supply voltages and updated some of the resistor values as well as the transistors for SMD ones and it works flawlessly.

    Many thanks again!

    All the best,


  • Hi reyjr,

    I was wondering whether it would make more sense to have the emitter of Q1 attached to Vin, instead of the collector? In case not, could you please explain why?

    Very weirdly, I have simulated both cases in LTSpice, and in both I obtain the exact same results, which is really strange. Could you please recheck that on your side? (I attached the LTSpice file to this message in case you don't have it anymore)

    Many thanks in advance!

    Best regards,



  • Hi Pascual,

    The orientation of transistor Q1 is incorrect. You are correct, the emitter should be connected to Vin. From the snippet I posted, Q1 will never be in saturation region since the collector-emitter is always reverse-biased. The sequence of the level shifter circuit I posted should be, Q2 will turn-on then Q1. 

    I also run the simulation and compare the results of different Q1 config and likewise I was able to obtain the same Vout results. However, when I check the Vce of Q1 and Q2, the voltage across the C-E is different. I couldn’t observe Q1 turning off. 

    I also check the run pin when the enable pin toggles. The run pin voltage in both config is different, the level of run pin when the enable pin is high is not enough to turn-off the converter and that’s why the converter is running. When Q2 is off, both transistor is off, the run pin is seeing the Vout which turn-off the converter. 

    When the collector is connected to Vin, the level shifter is not working properly. It does not shift the voltage as design. The possible reason why voltage is slightly shift is because the transistor is operating in active region. Below are the results of my simulation.

    Q1 Emitter Connected to Vin

    Q1 Collector Connected to Vin