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LTC3722 LTspice

There seems to be some switching action in the SR mosfets even when the mosfet is turned off. The Vds during turn off appears to be square waves which have an amplitude of approximately 650 - 700V. There's some oscillatory drain current (probably through the body diode). This causes some excess dissipation and may also cause destruction of mosfets in a practical setup. I think that the Vds across these SR mosfets would be Vin/N where Vin = 390V and N = 3. Thus around 130V + some ringing due to leakage inductance and resonant transitions would be the worst case scenario. However 700 V seems to be too high. Please let me know if I am making any sense with the above numbers.

Note: Using a mosfet with less rated Vds leads to more dissipation. This is perhaps the way Ltspice is showing that the breakdown has been reached. 

I tried using a clamp circuit at the output which reduced the Vds to some extent (~500V) and significantly improved the dissipation. However the clamp resistors were now the source of high dissipation.LTC3722_Fixed delay3_1_Adaptive_snubber_clamp.asc  

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  • The reverse  voltage expected on the SR mosfets is (390/3)*2 = 260V exclusive of resonant ringing (*2 for the CT secondary). Resonant ringing would double that to 520V. When rectification in the body diodes occurs, additional energy is added to the parasitic resonant circuit pushing voltages higher. The best design results from getting the best component characteristics with low parasitic L and C, and the best mosfet characteristics, and then balancing snubber and clamp dissipation with required mosfet ratings. Ultimately this has to be done with a physical breadboard.