For the layout of the pin, the datasheet seems to be missing some vias. Is it recommended to do via-in-pad for the fanout of this part? Further, it seems the labeling of the numbers in Figure 62 is reversed. The layout also does not show a connection between AGND1 and AGND2, is it safe to assume these are internally connected and an external trace is not required?
To minimize any extra resistors, are there any concerns to leaving the inputs "ILIM, ICS" disconnected/floating?
Can STP be left floating? Or is it recommended to tie to Pgnd with a pull-down?
Can ENCHG be safely tied directly to the USB supply to ensure that charging starts whenever the 5v USB cable is connected? Any current limit on this? If this pin is left floating, does that mean that charging will only start from the i2c command?
It seems that the default value for EN1 is set to enable buck output, so perhaps this can also be left floating as well, thus eliminating the need for the resistor and track to VSYS.
Kevin.Yao Do you have any ideas if I can float STP, EN1 and ENCHG? Can I tie ENCHG Directly to VSYS without a pull-up?
The layout doesn't show vias for the inner circle balls but AGND1 and AGND2 are connected internally. If you don't want to use STP function. you can try to connect STP to AGND2, tie ENCHG to VSYS. If you don't want to use Buck1, you can float the EN1 or else you need tie to VIN1. ICS and ILIM can be floating. The charger enable is ENCHG pin logic OR'ed register bit EN_CHG.
Thank you Kevin. I did not realize that EN1 is logically AND'd with the Register. I thought it was a logical OR. I will tie this to VSYS. It mentions a resister is recommended in the datasheet, can a resister be safely omitted in terms of current leakage?
For EN2 it is safe to float it and enable the buck/boost via the I2c command? I believe this one is Logically OR'd in the datasheet.
You can omit the resistor and directly tie to VSYS. EN2 can be floating as it's logical OR'd.