We are planning to implement a power path controller using the below circuit.
We need to know the tome delay between the assertion of ctrl pin and the gate and stat pin outputs when the powwr supply is switched from primary to auxillary.
We need the above timing delay to make sure that the load voltage will not drop very much and the system will be stable.
Peak current load of our system is 1A . Please advise us the capacitor needed at the output voltage side.
Note: we are planning to use DMP6110SFDF-13 P-MOSFET from diodes incorporated.