For primary cells, the SOC accuracy isn't really relevant, since the IC is just providing coulomb counter data. For this purpose, the gain and offset error of the part are much more relevant. With the WLP MAX17201, the offset is typically 1 LSB, and the gain is < 1% across temperature. With the sense resistor size, and the expected runtime of the application, they can estimate the error in the coulomb counter as follows:
Gain error: Application_current x duty cycle x application life (hours) x 1%
Offset error = 0.15625 uV/RSense x application life (hours)
Total error = Gain error + offset error
Error % = total error / Cell Capacity.
For the series/parallel arrangement, it really depends on the power requirements of their application. The FG will perform similarly in both scenarios.
The customer will need to track the coulomb counter change, and do their own capacity subtraction algorithm for low temperature or high discharge rates.