The NVBusy bit in the CommStat register (i.e. 61h) tracks if non-volatile memory is busy (NVBusy = 1) or idle (NVBusy = 0). There is also an NVError bit in the CommStat register that is set if there was an error during command execution. Once the NVError bit is set, the bit must be cleared by software to detect the next error. To confirm the NV write process has completed, the NVBusy and NVError bits must both be cleared after writing to NV memory.