The datasheet recommends using 3kΩ resistors on cell input voltages. It specifies that under certain circumstances these can be left out. The datasheet reasoning is that it protects against over current if the internal ESD diodes are forward biased. If VP and GND are connected first, it says the resistors can be left out. Some customers don't understand the implications. If VP isn't connected, it will be floating, so forward biasing the diodes shouldn't be a problem, right?
- Is there a more detailed explanation as to why the resistors are needed? Eliminating extraneous components is always desirable.
Regarding the 3kΩ resistors.
- If the customer can guarantee that VP and GND are _always_ connected first, then they can eliminate these resistors. Customers have successfully implemented application circuits that absolutely ensure that VP and GND are connected before any other cells, and they have removed the 3k resistors without issue. However, be aware that if the resistors are not in place and any other cell connects first, the likelihood is that the part will be damaged.
- In theory, if VP and GND were floating, and any other cell was connected, there would be no discharge path and the diodes could not forward bias. The reality, however, is that the VP pin will have some capacitance connected between it and the ground plane – either a bypass capacitor or some stray capacitance somewhere on the board. The problem is that any capacitance on the VP pin can serve as a discharge path for the internal ESD diodes when any cell voltage is connected before the VP voltage. Very little capacitance can close the loop, allowing the diodes to forward bias and be destroyed (this can take nanoseconds, so even a little capacitance is enough).