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LTC4011 NiMH Charger Trapped in Battery Qualification Loop (READY/CHRG Flashing)

Category: Hardware
Product Number: LTC4011

Hi, 

I am working on a custom NiMH battery charger design based on the LTC4011. The circuit is powered from a DC supply, but it fails to initiate the charging process. It seems trapped in a continuous startup/qualification loop.
Here are my design parameters and setup details:
  • Battery Pack: 5-Cell NiMH (~6.5V current open-circuit voltage).
  • Current Sense Resistor (\(R_{SENSE}\)): 68 mΩ (Targeting ~1.47A fast charge current).
  • Voltage Divider: \(R_{1}\) = 120kΩ (connected to BAT), \(R_{2}\) = 30kΩ (connected to VCDIV).
  • Thermistor Setup: The battery pack doesn't have an NTC. \(V_{RT}\) and \(V_{TEMP}\) are shorted together to disable temperature qualification. (I also tried a 10k/10k voltage divider on the TEMP pin, but the behavior remains identical).
  • CHEM Pin: Tied to GND..
The Symptoms & Observations:
  1. LED Behavior: The READY and CHRG LEDs are continuously blinking/flashing.
  2. The "Unplug" Phenomenon: Curiously, right at the exact millisecond I unplug the battery connector, both LEDs light up solid for about 1-2 seconds (before powering off), and the circuit draws around 110mA from the main DC source during that brief moment.
  3. VCELL and VCDIV Behavior: I cannot measure a stable DC voltage on the VCELL (Pin 8) or VCDIV (Pin 9) pins. The voltage fluctuates wildly (pulsing between 1.9V and 4.4V). It looks like the internal open-drain MOSFET on the VCDIV pin is throwing sampling pulses but fails to pull down cleanly due to the loop resetting.
  4. Gate Outputs: Since the IC never passes the qualification phase, TGATE and BGATE outputs show no switching waveforms on the oscilloscope.
  5. Other Rails: \(INTV_{DD}\) stays stable at 5V, \(V_{CC}\) and \(V_{DC}\) rails look completely clean and within specs. INFET correctly drives the reverse polarity protection P-channel MOSFET.
Since the static calculations (\(R_{1}\), \(R_{2}\), \(R_{SENSE}\)) mathematically match the datasheet formulas perfectly for a 5-cell pack, I am struggling to find why the IC keeps rejecting the battery or failing the initial pre-test.
Has anyone encountered this specific battery-detection loop or unstable VCELL pulsing on the LTC4011? Could this be related to PCB layout parasitics, or am I missing a specific startup condition?
Any help or schematics review would be highly appreciated. Thanks!