LT3652 design stops charging around 4.0 V on LiPo (solar input ~18 V)

Hi all — I’m a hobbyist and I’m asking for help debugging a solar Li‑ion charger built around the LT3652; schematic attached (schema_v1.pdf). I’m using the LT3652 to charge two 18650 cells in parallel, and the charger repeatedly stops charging when the pack voltage reaches about 4.04–4.08 V instead of completing to the programmed float voltage of 4.20 V.

Setup and what I measured

• Input: small solar panel, about 18 Voc open‑circuit; VIN to the board is the panel output under load.

• Battery: two 18650 cells in parallel, treated as a single pack.

• Charger: LT3652 configured with a resistor divider on VFB to target about 4.2 V float. I first used divider values that should have given the correct float voltage when referenced to the 3.3 V VFB reference. The initial design used a divider whose equivalent resistance was chosen to follow the datasheet guidance for input bias compensation; in a later revision I increased that equivalent resistance, but the behavior did not change.

• I also tried other divider combinations, including 330 kΩ / 1200 kΩ, but the result is the same: charging still stops around 4.0 V and does not reach the full 4.2 V target.

• Observed behavior: charging current is reduced and CHRG goes low when the battery is around 4.04–4.08 V, not at 4.20 V. This happens in both v1 and the next version.

Measurements and checks

• I monitored current and voltage with an INA219 on both the battery side and the solar side; the battery never charges above the ~4.0 V threshold. The INA219 readings confirm that current falls toward zero at that voltage.

• SHDN pin: measured always above 1.25 V, so the LT3652 is not being held in shutdown; the datasheet lists the SHDN rising threshold at about 1.2 V.

• VIN_REG: I measured VIN_REG above its threshold (greater than 2.7 V) while the panel is connected, so the VIN_REG undervoltage condition should not be forcing an early stop according to the datasheet.

• VFB / divider: I verified the divider values and later increased the equivalent resistance seen by VFB to match the recommendation for input bias compensation, but the issue persisted. The VFB pin input bias current is small, and the datasheet suggests an equivalent divider resistance near 250 kΩ; I followed that guidance and still see early termination.

What I have not assumed or changed yet

• I did not intentionally drive SHDN low, and there is no code toggling it; measured SHDN stays above the enable threshold.

• I did not change the safety timer behavior; it is configured as in the schematic.

Questions

Based only on the schematic and the measurements above, what likely causes should I investigate next? For example:

• Could PCB layout or component placement (switch node, VIN_REG, VFB sense traces, or noisy boost/switch loop) cause the IC to misread VFB or prematurely reduce current?

• Are there any common LT3652 pitfalls, such as component values, sense resistor wiring, diode orientation, inductor placement, or grounding issues, that could cause early CV termination around 4.0 V?

Thanks in advance for any help — I’d really appreciate any targeted checks or measurements you recommend.

schema_v1.pdf