External passive balancing controlling

Thank you for your inquiry. I am looking into this and will get back to you as soon as possible.

Question 1 & 2: It seems you've answered your own question here. According to the datasheet (page 38), the PWM duty cycle for S pin passive balancing control is configurable (anywhere from continuously on to continously off with increments of 2 seconds, see Figure 17). The frequency is as you've stated 1/30 (0.033Hz). This is assuming you are only talking about controlling the S pins using the DCC register group.

Question 4: Since all of the DCC bits are part of the config register group, it seems to me that all the S pins could theoretically be controlled (opened or closed in any combination) at the same time.

Question 5: Page 71 states that balancing currents should not exceed 60mA due to excessive heating above that level. The balancing current goes through the S pin if you're using the internal MOSFETs so I'd probably consider that the maximum limit.

I do not understand what is meant by your question 3 and have thus skipped it.
Note I am not an employee of Analog Devices, so do not take these answers as 100% truth, however I am reasonably confident in the answers I've provided.

Keyur said:

1. What is PWM frequency of the S pin for cell discharging?

2. In datasheet its say " Each PWM signal operates on a 30 second period" it's means PWM frequency is 1/30 ?

Yes, you are right. The frequency of the PWM on S Pins for External Cell Balancing by configuring the DCC bits in the device is 0.033 (=1/30) Hz. You can find more info about it in the Table.17 of the Datasheet(Page No.38).

Keyur said:

What is voltage at S pin on?

When S-Pin is configured for External Cell Balancing, an internal PMOS pulls the S-Pins to VREG so the output voltage on S-Pin will be within 0 to VREG(i.e, 5V). You can find more info in Cell Balancing with External Transistors section of the Datasheet (Page No. 72)

Keyur said:

4.When 2 or more cell unbalance than all S pin controlled by DCC simultaneously or one by one for external passive balancing ?

Yes, all S-Pins can be controlled simultaneously. I guess you have a doubt regarding the switching internal mentioned in the datasheet page no.39, it refers to only the switching interval i.e, the turn-on or turn-off transition on the S-Pins or the High to Low edge or Low to High edge switching transition on the S-Pins being timed one after another and not all switch on or off simultaneously. 

Keyur said:

5. What is current limit of S pin? I want to calculate the s pin resistance. or I just put 3.3K ohm?

For external balancing, we would suggest you refer to the application information on Page No. 72 for choosing the right discharge resistor.

Thank you for your reply.

I want to calculate the gate resistor value for connecting the S pin and the external MOSFET gate terminal.

In the datasheet, it shows 3.3K is used.

I am using RRH050P03 P channel Mosfet as external balancing.

Keyur said:

In the datasheet, it shows 3.3K is used.

You can use the same in your case as well. That gate resistor is to reduce the noise and dampen/prevent ringing on the FET input.