Post Go back to editing

LTC4015 breaking when connecting lead-acid battery

Description of problem

I have a problem with a circuit that implements the LTC4015.
The problem occurs when I connect a life power supply or 12V lead-acid battery to the circuit.
The result is the breakdown of the LTC4015.

Functional and testable

When I connect a lab power supply (turned off) to the battery input of the circuit and slowly increase the voltage on the lab power supply, the LTC4015 turns on and opens the OUTFET.
A voltage of 5V can be measured on the INTVCC pin (INTVcc regulator).

Breakdown/failure

When I connect a 12V lead-acid battery to my circuit the LTC4015 breaks. (Case 1)
When I turn on the lab power supply, set the output voltage to 12V and the current limit to 10mA, and then connect it to the circuit, the LTC4015 breaks down, but in a less destructive way. (Case 2)

Test equipment

  • Power supply: Rigol DP832A
  • DC-load: Siglent SDL1020X-E

Battery specifications

  • Manufacturer: MWPower
  • Model: MWS 7.2-12
  • EAN: 5902135116968
  • Voltage: 12V
  • Capacity: 7.2Ah
  • Internal resistance (charged battery): 36mΩ1
  • Max. discharge current: 80A1

LTC4015 after breakdown

After the LTC4015 breaks down the following things can be measure/observed.

  • The INTVCC power supply is shorted to ground.
  • In the case of (Case 1), a hole can be seen at the bottom right of the chip.
    • LTC4015 hole (failure)
  • In the case of (Case 2), no physical damage of the chip can be observed.

Schematic

Some additional information about the schematics that might be useful:

  • R30, R31: These are 0Ω shunt resistors to enable/disable the use of the power path from VIN (charger input).
  • R10: 100kΩ resistor to use when no NTC is connected.
  • C17, C18, C19, C20, C21: 
    • Manufacturer: Samsung Electro-Mechanics
    • Model: CL31A106KBHNNNE
    • Capacitance: 10μF (± 10%)
    • Voltage rating: 50V
    • Dielectric characteristic: X5R
    • ESR can be found in image and website of manufacturer2.
  • CELLS and CHEMISTRY config:

    • Pins CELLS2 CELLS1 CELLS0 CHEM1 CHEM0 EQ
      Config L H Z Z Z L

The following images are the schematics of my circuit design implementing the LTC4015.

Board layout

Some specs of the board and its' layout:

  • Layers: 2
  • Width/height: 100mm x 80mm
  • Board thickness: 1.55mm
  • Copper layer thickness: 18 µm
  • Base material: FR4IMP

The following images are the top and bottom views of the board layout for my circuit design.

Overview system units

PCB top

PCB bottom

Notes

  • On the image of the breakdown of the LTC4015 in chapter "LTC4015 after breakdown", thermocouples with exposed metal tips can be seen. All temperature measurement points were provided with an initial layer of Kapton tape to prevent shorts.

References

[1] Cdn-reichelt.de. 2021. MWS 7,2-12 datasheet. [online] Available at: "cdn-reichelt.de/.../MWS_72-12_DS_EN.pdf" [Accessed 23 July 2021]
[2] Samsungsem.com. 2021. CL31A106KBHNNN specification sheet. [online] Available at: "weblib.samsungsem.com/.../mlcc-ec-data-sheet.do 23 July 2021]

Parents
  • Hi MVrieswijk,

    Hope you are doing well.

    A damaged IC as a result of plugging in a battery is most likely a hot-swapping issue resulting to inrush current. I've attached a document explaining how and why is this an issue on the LTC 4015 and what are the possible remedies for it.

    PDF

    With regards to your layout and schematic,

    I've noticed that what you used bypass cap on the 2P5VCC is 470nF. In the datasheet, the value used should be a 2.2uF MLCC. Also, the cap must be located closer to the 2P5VCC pin and must have a very short GND path to the GND paddle of the LTC4015 IC. It is also recommended that you have at least 4 layers (especially that is designed to charge for more than 4A) for this design to for better routing and to have it heavily reference to the demo board design as much as possible to your application. For more info about layout consideration, visit page 46 of the datasheet. For the design files, please visit the attached webpage for the demo board of LTC4015, DC2039A.

    www.analog.com/.../dc2039a.html

    Regards,

    Siglo

  • Hello,

    I have the same issue with the schematic as in the datasheet on page 73 - application for the lead-acid 6-cell battery. My design is on four-layer FR4 PCB of 35 x 55 mm dimension. Could you please suggest effective solution how to avoid IC damage when Vin or Vbatt is connected?

    Thanks in advance.

    Stano.

Reply
  • Hello,

    I have the same issue with the schematic as in the datasheet on page 73 - application for the lead-acid 6-cell battery. My design is on four-layer FR4 PCB of 35 x 55 mm dimension. Could you please suggest effective solution how to avoid IC damage when Vin or Vbatt is connected?

    Thanks in advance.

    Stano.

Children
No Data