Article How can current spikes at the input of the LT3092 be minimized during high dV/dt transients?

The high dv/dt (rate of change of voltage) of the input voltage causes the current spike. To minimize input current spikes during high dV/dt transients on the LT3092, the goal is to slow down the rate at which the input voltage changes and to buffer the input against sudden surges.

Here are several effective strategies: 

  1. Add an RC Network to VIN: Implement an RC network to limit the dv/dt of the input voltage. This can help reduce the current spike by reducing the rate of voltage rise.

  2. Disable SET During Startup: Consider disabling the SET pin during startup using a series transistor or MOSFET in the RSET configuration.

  3. Adjust RSET Value: Adjust the RSET value during startup and then switch to the correct value after the startup phase using a potentiometer. Note that this may affect the output during the transition and should be verified in your design.

Disclaimer: The approaches mentioned above are not exhaustive and have not been formally tested or validated. They are based on general best practices and theoretical considerations. Actual performance may vary depending on specific circuit conditions and components used. It is recommended to prototype and test thoroughly in the intended application environment.

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