The datasheet is correct. 0x00 and 0x01 are reserved for SD0, SD1, SD2 and SD3. 0x02 represents 0.625V and each additional LSB increases the output voltage by 12.5mV
The registers FPSSRC is used to assign a resource (Buck, LDO, or GPIO1-GPIO3) as part of the flexible power sequencer.
FPSSRC can be set as follows:
0b00 = FPS0
0b01 = FPS1
0b10 = FPS2
0b11…
The FPSPU and FPSPD registers assign the resources to an FPS slot within the sequencer (Slots 0 to 7) 0b000 = 0 and 0b111 = 7.
For example, In the figure above LDO4 is assigned to FPS0 slot 0 (power…
Maxim recommend using the MAX77863 PMIC to power Xilinx's ZU2CG. The MAX28200 versatile microcontroller may also be needed in order to configure the PMIC on startup. The FPGA power specifications vary…
