Designing with high speed precision analog circuits

Please tell us more about your experiences and the potential pitfalls of designing high speed precision analog circuits.

[edited by: lallison at 4:51 PM (GMT -5) on 30 Nov 2018]
  • Aside from the usual compromise of DC accuracy often found in high-speed op-amps the other big design issue is precision high speed circuits where settling times better than 0.1% are needed. Most data sheets specify settling to 0.1%. Occasionally there are parts like the AD8021 which has settling time specified to 0.01% but this is rare and the AD8021 may not be suitable for some low noise designs

    The other issue with precision high speed circuits is the reliability of simulation models (or lack of it), typically models are built using behavioral blocks so can't reliably determine properties of components at low signal levels - especially if it's the op-amp that is the limiting factor in the system. Here at OAInnovations we have done considerable research into device settling times and measurement  techniques so are well equipped to get the best possible settling times from low noise high speed amplifier designs.