Check out Fidus' latest invention - the Mantyss-32G. It's a Zynq UltraScale+ Daughterboard for the Synopsys HAPS Prototyping System.
Features:
Xilinx Zynq UltraScale+ ZU19EG MPSoC
• Quad-core Arm® Cortex-A53 plaorm with huge FPGA fabric (PL)
• -3 speed grade, verified to 32 Gbps operaon
High Speed Links
• Samtec FireFly 1, 4 lanes x 32Gbps (GTY)
• Samtec FireFly 2, 4 lanes x 32Gbps (GTY)
• Samtec FireFly 3, 4 lanes x 16Gbps (GTH)
• Samtec FireFly 4, 4 lanes x 16Gbps (GTH)
• FMC+, 8 lanes x 32Gbps (GTY), 16 lanes x 16Gbps (GTH)
I/O Interfaces
• FMC+ (VITA 57.4), 4 x FireFly (opcal or electrical), USB3.0
• GigE, microSD, SD, UART-over-USB serial port
• Xilinx JTAG, Arm JTAG, Arm Trace (MICTOR-38)
• MMCX clock IO, PMOD, Synopsys PB/LED header
HAPS Connection
• Directly connects to HAPS using six HT3 connectors
• HT3 connections pinned out to the HP banks on the PL
• Provision multiple Mantyss modules on HAPS
Memory
• SO-DIMM, 16GB x72, Dual Rank, resource PS
• SD slot, for memory or SD peripherals, PL resource
• USB3.0 port, for additional storage
This was an extremely dense design, with high-speed traces, extreme length matching requirements, and sophisticated power requirements. The power requirements were met using an Analog Devices uModule solution. The 50A core current is provided by paralleling a dual output 25A LTM4678 converter. The other uModules meet the strict noise requirements of the Zynq US+ transceivers, and the flexibility requirements of the FMC+ port. The ADI-based powertrain is shown below.
ADI's team offered excellent support, guidance, and review throughout the entire design process!
For more information, please visit: https://fidus.com/products/mantyss/
Thanks,
Scott