the datasheet specifications.
The attached figure (reset timing diagram) is from the ADN8102 data sheet,
which is actually the same die as ADN4600, but fused to provide a different
function. The spec covers how long to hold /RESET low, spec is a minimum of 10
ns, but the starting point for this time is after DVCC enters into the region
between min and max values. There is no harm in holding this low for a longer
period. The attached figure shows what the minimum time should be.