Using RF generators as a reference clock and using PLL how should the RF and DC supplies be connected to the AD9956 Evaluation Board?

  • Connect AVDD and DVDD to the specified voltage ± 5%.
  • Connect DVDD_I/O and CP_VDD to the specified voltage ± 5%.
  • Connect the RF clocks to J1 and J2 on the evaluation board.
  • Refer to page 3 of the schematic (AD9956 Rev. E Schematic) for TB1 pin connections.
    • Pin 1, 2, and 4 are connected to the AD9956.
    • Pin 5 is connected to the Cyprus chip.
  • Review the loop measurement conditions on page 9 of the datasheet for clock recommendations. An equivalent clock can also be used.
  • Ensure all connections are made as per the schematic and datasheet specifications to achieve the desired frequency using the PLL.
    Tags: clock and timing Direct Digital Synthesis (DDS) ad9956