AD9361 XTAlN/P Vin max and the ADRV9361-Z7035 clock Vih input discrepancy query.
Question: In the AD9361 data sheet Rev.G, page 6 the ref_clk signal max level states 1.3Vpp. But in the ADRV9361-Z7035 schematic (02-038702-01-f2.pdf). The Y4 (Rakon YSML126W98H47) Crystal Oscillator output is 1.8v . Even with a small voltage drop across the ADG772BCPZ. The voltage output still exceed the max 1.3v into the AD9361 XTAlN/P Vin as the Vin Max stated is 1.3v. Please advise the discrepancy.
Answer:
The Rakon spec Vol and Voh of 10% and 90% of Vdd, assuming Vdd =1.8v . which approx 0.18v and 1.62V. with the ADG772 there would be a slight voltage drop across it. Having said this, it would still be higher than the input to the AD9361 of (1.3v). The trick here is that from the schematic (ADRV9361-Z7035 schematic 02-038702-01-f2.pdf) the capacitor "C165" are not populated as per the BOM item 13 as DNI (Do Not Insert) and that the AD9361 IC's internal capacitance (i.e. Cin to the IC's input) is now in series. From this effect it forms a series with the capacitor C216. When two capacitance are in series it act as a voltage divider, and the voltage Vin is now reduced to below 1.3V.