In the I2C specification document the maximum SCL/SDA rising time is specified as 1000ns. In the MAX31790 datasheet we define maximum rising time as 300ns (typ). Will the MAX31790 be suitable for an application at 100kHz with a clock rising time of 500ns?
The MAX31790 is rated for Standard and Fast I2C modes. The rise and fall time specification in the official I2C document is 1000ns and 300ns max for standard and fast modes respectively. It means that rise time should not be more than 1000ns for standard and 300ns for fast mode. The fast mode also has a minimum spec of rise time which is 20ns. Thus, the rise time can be any where from 0 (theoretically) to 1000ns for Standard mode and from 20ns to 300ns for Fast mode. The specification of rise time in the MAX31790 datasheet is just a typical value and the actual I2C specification holds.