What are the trade-offs between power consumption and conversion speed in the MAX1464?

Systems that operate with very low-power consumption benefit from the reduced ADC clock rate, FADC. Slower clock speeds require less operating current. Systems operating from a larger power consumption budget can use the highest FADC clock rate to improve speed performance over power performance. The ADC conversion times for various resolution and clock rate settings are summarized in the ADC Conversion Time table in the MAX1464 data sheet. The conversion time is calculated by the formula: TCONVERT = (number of FADC clocks per conversion) / FADC. The number of clocks per conversion is a function of the desired conversion resolution.