ADP509x

A few questions with respect to the ADP509x devices.

1. The ADP509x data sheet states in a couple of places that "for the best operation of the system, use PGOOD  to enable the system load or to turn on an ultralow power load PFET".  Exactly what performance benefit is achieved by using an additional external load switch?

2. If SYS or Reg_Out are enabled via an external load switch using PGOOD or REG_GOOD (5092 only), power to a connected load will experience a rather fast leading edge.  Connected load capacitance will likely result in currents exceeding device limits, 1000 mA for SYS and only 150 mA for Reg_Out.  Reg_Out is described as having an internal current limit of ~200 mA and SYS is stated as having no internal limit.  It is further recommended to limit SYS and BAT currents to less than the 1000 mA spec.  My questions are primarily associated with the Reg_Out piin as that is the pin I plan on using.

  • Is the ADP5092 Reg_Out pin protected against high initial load capacitive in-rush currents, say 800 to 1000 mA by its internal current limit, or should some form of soft start be incorporated with an external load switch?
  • Will high initial load capacitive in-rush effectively shut down the Reg_Out output?  I.E. the data sheet states that the output voltage reduces to maintain a constant current limit.  Will a high initial in rush current force the output into some sort of limit cycling that it can't get out of?

Thanks much for any clarification you can provide.

  • 0
    •  Analog Employees 
    on Aug 12, 2021 6:53 PM

    Hi, 

    1. with the PGOOD, it can make sure the BAT is connected to the system and the hysteresis can also help the support the startup current of the system.

    2. For SYS, you can use an external load switch and there is a capacitor at SYS pin so it should be fine for the startup current. For REG_OUT, there are REG_D0 and REGD1 as the enable pin so you don't need extra load switch. The REG_OUT pin cannot support 800-1000mA startup current. The current limit is 260mA typically. 

    Can you clarify where this high surge current is from?

    BRs,

    Kevin

  • I am assuming there is some voltage level present internally at the internal regulator output when the internal REG_SWITCHES switch on that would lead to a fairly fast output rise, ie. a step output to this level.  Waveforms in the data sheet seem to indicate this, though after a more careful look, this rate of rise may not be as fast as I was first thinking.  If Vsys (BAT) however is up to some charge level and Vsys is enabled via an external load switch, the output of the load switch would be a step rise to the Vsys level present when PGOOD goes active.  Applying a voltage step to any significant load capacitance would lead to a high capacitive in rush current.  

    Similar in rush levels might occur if portions of external loads are turned off, essentially disconnected, and later reconnected.  In this case, a fully discharged load would be re-connected to the full output of the power rail supplied by the ADP509x, and any load capacitance would again be subjected to a step voltage input.  This could occur at either the SYS or Reg_Out outputs.

    I am concerned over time that these turn on current spikes, either when the ADP509x outputs are enabled directly, through an external load switch or an external load comes in and out of different sleep modes might harm the ADP509x outputs.