ADSP-CM408F: FAQ

Created over 9 years ago
Updated 2 months ago

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ADSP-CM40x feature a Data Cache?

Question Does ADSP-CM40x feature a Data Cache? Answer The 16KB cache inside ADSP-CM40x is designed to accelerate execution from flash memory, which means that it is meant to act as a Code Cache. Because…
Are MEMX and MEMY physical memories?

Question Are MEMX and MEMY physical memories? Answer No, these are only virtual memory that don't have any physical memory when inside them. They are only translation memory regions which are used for…
Can I Perform flash programming in SPI Memory Mapped mode?

Question Can I Perform flash programming in SPI Memory Mapped mode? Answer No, SPI Memory Mapped Mode only works with Read access. There is no write port associated with it.
Can I Perform flash programming in SPI Memory Mapped mode?

Question Can I Perform flash programming in SPI Memory Mapped mode? Answer No, SPI Memory Mapped Mode only works with Read access. There is no write port associated with it.
Can I place DATA in CODE memory and vice-versa?

Question Can I place DATA in CODE memory and vice-versa? Answer The ADSP-CM408F (an example package used for explanation) has 384KB of internal SRAM memory that may be used as CODE or DATA. This is allowed…
Can I use MATLAB and Simulink with the ADSP-CM40x and IAR Tool-chain?

Question Can I use MATLAB and Simulink with the ADSP-CM40x and IAR Tool-chain? Answer While there is no direct interface between the IAR Tool-chain and MATLAB or Simulink, Mathworks offer the “Embedded…
How can I utilize Cache with Async memory connected SRAM?

Question How can I utilize Cache with Async memory connected SRAM? Answer SMC interfaced memory and Cache – how design works A memory connected to SMC can be accessed directly from the system memory …
SPI/Cache :: Line-Wrap mode vs. Line-base-first mode. Which one to choose?

Question SPI/Cache :: Line-Wrap mode vs. Line-base-first mode. Which one to choose? Answer Wrap mode Wrap mode is a specific feature supported by most flash devices in market. It enables the host processor…
What do I need in order to evaluate the ADSP-CM40x Processors?

Question What do I need in order to evaluate the ADSP-CM40x Processors? Answer You need the following: • The ADSP-CM408F EZLITE (for evaluation of the ADSP-CM407F and ADSP-CM408F processors) or the…
What is the EngineerZone URL location?

Question What is the EngineerZone URL location? Answer http://ez.analog.com/community/dsp/adsp-cm4xx-processors

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ADSP-CM408F: FAQ

ADSP-CM40x feature a Data Cache?

Are MEMX and MEMY physical memories?

Can I Perform flash programming in SPI Memory Mapped mode?

Can I Perform flash programming in SPI Memory Mapped mode?

Can I place DATA in CODE memory and vice-versa?

Can I use MATLAB and Simulink with the ADSP-CM40x and IAR Tool-chain?

How can I utilize Cache with Async memory connected SRAM?

SPI/Cache :: Line-Wrap mode vs. Line-base-first mode. Which one to choose?

What do I need in order to evaluate the ADSP-CM40x Processors?

What is the EngineerZone URL location?

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