AD9832: FAQ

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AD9832: Driving from LVCMOS

Question I have a problem concerning AD9732 (analog Device DAC ) Its Data comes from FPGA (xilinx -virtex2 ) which works in LVCMOS Technology , It means VOHmin=2.9 Volt and VOLmax 0.4 V. Can This DATA…
AD9832: Driving from LVCMOS

Question I have a problem concerning AD9732 (analog Device DAC ) Its Data comes from FPGA (xilinx -virtex2 ) which works in LVCMOS Technology , It means VOHmin=2.9 Volt and VOLmax 0.4 V. Can This DATA…
AD9832: Seperated DGND and AGND

Question I work on the AD9832 evaluation board and I’d like to have two different voltages for Dgnd and Agnd (0.5V offset between the two power supply). But on the evaluation board the Agnd and the…
Documentation error: AN-1108 application note, AD9832 analog output on reset is incorrect

Question In datasheet AD9832 Rev. C at page 15 describes When RESET (D12) = 1, the phase accumulator is set to zero phase that corresponds to an analog output of midscale. in AN1108 at page 3 describes…

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